Here is a complete, consolidated set of notes covering all the topics from our discussion, structured from the basic definitions to the global context and India’s specific policies.
Complete Notes: Semiconductors and the Indian Semiconductor Mission
Part I: Key Definitions (The Building Blocks)
First, it’s essential to understand the hierarchy of the components:
- Semiconductor: This is the base material (most commonly silicon) whose electrical conductivity can be precisely controlled. Think of this as the raw clay.
- Transistor: This is the fundamental component built from the semiconductor material. It acts as a microscopic switch that can stop electricity (“0”) or let it pass (“1”). This is the single brick made from the clay.
- Chip (Integrated Circuit or IC): This is the final product. It is a complex system (like a processor or memory) made by placing millions or billions of transistors onto a single, small piece of semiconductor. This is the entire house built from millions of bricks.
- Fab: This is the common industry term for a semiconductor fabrication plant. It is the massive, multi-billion dollar factory where chips are manufactured.
Part II: The Global Semiconductor Industry
The global industry is not a simple supply chain; it’s a deeply interconnected Global Value Chain (GVC). This structure was created by two competing economic forces:
- Moore’s Law: The observation that the number of transistors on a chip doubles roughly every two years, making technology exponentially more powerful and cheaper (per function).
- Rock’s Law: The counter-observation that the cost of building a fab to produce these new chips doubles roughly every four years. A new fab now costs over $20 billion.
The conflict between these two laws (needing to be cheaper, but costing more to build) forced companies to become hyper-specialized.
The Global Value Chain (GVC) & Key Players
The GVC is broken into three main stages, each dominated by different countries and companies, creating “choke points.”
| Stage | What It Is | Key Players (Countries/Companies) | Key “Choke Point” (Monopoly) |
| 1. Design (The “Blueprint”) | The high-value, R&D-intensive phase of designing the chip’s function. | USA (Nvidia, Apple, AMD, Qualcomm) UK (ARM – licenses its architecture to all mobile chips) | EDA Software: The software needed to design a chip. This is a 100% US-dominated monopoly (Synopsys, Cadence). |
| 2. Manufacturing (The “Fab”) | The extremely capital-intensive process of physically building the chips on silicon wafers. | Taiwan (TSMC – controls >50% of the global foundry market and 90% of the most advanced chips) South Korea (Samsung) | EUV Machines: The lithography machines needed to make advanced chips are a 100% monopoly of ASML (Netherlands). |
| 3. ATP (Assembly, Testing, Packaging) | The final, labor-intensive stage of cutting the chips from the wafer and packaging them. | China, Malaysia, Vietnam, Taiwan | This stage is less technologically complex but still a critical bottleneck. |
Geopolitical Drivers
This GVC structure has created immense geopolitical tension:
- US-China Tensions: The US uses its “choke points” (EDA software, design) to block China’s access to high-end chips (like AI chips).
- Taiwan: The world’s entire modern economy (Apple, Nvidia, etc.) depends on TSMC in Taiwan. The threat of a Chinese invasion of Taiwan puts this entire supply at risk.
- Response: In response, countries like the US (with its CHIPS Act) and India are now spending billions to “onshore” or “friend-shore” manufacturing to reduce their dependence on this fragile supply chain.
Part III: The Indian Semiconductor Mission (ISM) (2021)
Launched in 2021, the ISM is India’s $10 billion (approx. ₹76,000 crore) plan to build a domestic semiconductor and display ecosystem.
India’s Existing Status
- Design Talent: India has a strong, world-class talent pool (an estimated 20% of the world’s design engineers are Indian). However, this talent primarily works for foreign multinational corporations (MNCs).
- Manufacturing Gap: India has absolute zero commercial presence in manufacturing (fabrication).
The Four Main Schemes of the ISM
1. Design Linked Incentive (DLI) Scheme
- Rationale: To leverage India’s existing design talent and encourage domestic startups.
- Support:
- Infrastructure: Provides startups with subsidized access to prohibitively expensive EDA design tools and IP licenses through the government’s C-DAC.
- Financial: Provides cash incentives (Product Linked Incentive and Deployment Linked Incentive) of up to ₹15-40 crore when a chip is commercially deployed.
- Target: To support 100 domestic design companies.
- Challenge: The scheme has seen a lukewarm response. The financial support is considered too low, and the 50% FDI (Foreign Direct Investment) limit (plus a 3-year “remain domestic” clause) restricts startups from raising the large-scale global capital needed to compete.
2. Manufacturing (Fab/Foundry) Scheme
- Incentive: This is the flagship scheme. It provides a massive 50% of the capital cost (capex) upfront as a direct subsidy.
- Target: This support is highly concentrated and intended for only two major fabrication companies.
- Scope: The incentive applies to all technological nodes (transistor sizes), including mature nodes (like 45nm or 65nm) which are critical for cars, appliances, and defense.
- Status: A major proposal by the Tata Group (in partnership with a Taiwanese company) has been approved to build India’s first major fab.
3. Assembly Testing Packaging (ATP) & Compound Semiconductors
- Incentive: Provides a 50% capex incentive for companies to set up ATP facilities.
- Target: To support 15 companies in this segment.
- Scope: Also covers Compound Semiconductors (e.g., Gallium Nitride, Silicon Carbide), which are special chips for high-power applications (EVs, 5G radios).
- Status: This has been the mission’s most successful scheme, with US chip giant Micron Technologies already building a large ATP plant.
4. Display Technology Scheme
- Note: This scheme is for “display fabs” (manufacturing screens), not semiconductor chips.
- Relevance: Display panels (LCD, AMOLED) are a huge import cost for mobile phones (25-50% of the cost).
- Challenge: The scheme does not cover higher-end technologies (like QLED or OLED) and, more importantly, India would still be 100% dependent on China for the critical raw materials needed to make the screens.
Part IV: Overall Challenges for India
- Infrastructure: Fabs require a 24/7, 100% stable supply of extremely high-quality power and ultrapure water. Even a millisecond fluctuation can ruin production.
- Technological Catch-up: India is trying to board a high-speed train that is already moving. By the time a fab is built, the technology may be a generation behind.
- Trade Barriers: The semiconductor industry is fundamentally import-dependent. India will need to import 100% of its machines, chemicals, and many raw materials. Imposing high import tariffs (trade barriers) would make domestic manufacturing uncompetitive from the start.
- Fundamental Conflict: The core challenge is that India is aiming for self-reliance in an industry that is, by its very nature, the most globally interdependent and hyper-specialized on Earth.
Here is a properly articulated, self-explanatory breakdown of the Indian Semiconductor Mission (ISM) based on your notes.
V. The Indian Semiconductor Mission (ISM) (2021)
Launched in 2021, the Indian Semiconductor Mission (ISM) is the government’s comprehensive strategy to build a domestic semiconductor and display ecosystem. The government has committed a significant financial outlay, starting with $10 billion (approx. ₹76,000 crores), with indications of this support potentially expanding to $15 billion over a long-term 20-year horizon to de-risk and attract investment.
The mission is designed to address India’s current, highly dependent position.
India’s Existing Status
The mission tackles two core issues:
- The Design Paradox: India has a strong, world-class talent pool, with an estimated 20% of the world’s semiconductor design engineers being Indian. However, this talent primarily works for foreign multinational corporations (MNCs), not for domestic Indian companies.
- The Manufacturing Gap: India has absolute zero commercial presence in semiconductor manufacturing (fabrication). This leaves its fast-growing electronics industry, from mobile phones to defense, 100% dependent on imports.
The Four Main Schemes
The ISM is built on four main pillars to build capacity across the value chain:
1. Design Linked Incentive (DLI) Scheme
- Rationale: To leverage India’s existing design talent and create a “fabless” ecosystem by fostering domestic startups and MSMEs.
- Support & Incentives:
- Infrastructure: Providing startups with subsidized access to prohibitively expensive EDA (Electronic Design Automation) design tools and IP (Intellectual Property) licenses through the government’s C-DAC (Centre for Development of Advanced Computing).
- Financial: Offering a Product Linked Incentive and a Deployment Linked Incentive. These are cash incentives (reportedly up to ₹15-40 crore) for companies whose chip designs are successfully built and commercialized.
- Target: To support 100 domestic design companies.
- Challenges: The scheme has seen a lukewarm response, reportedly due to two main factors:
- Low Funding: The financial cap (max ₹40 crore) is considered too low for the extremely capital-intensive chip design process.
- Restrictive FDI Limit: A 50% cap on Foreign Direct Investment (FDI) and a requirement for the company to remain domestic for three years severely limits a startup’s ability to raise the large-scale international venture capital needed to compete globally.
2. Manufacturing (Fab/Foundry) Scheme
- Incentive: This is the flagship scheme, offering a massive 50% of the capital cost (capex) upfront as a direct subsidy for any company willing to build a fab in India.
- Target: This high-cost support is highly concentrated and intended for only two major fabrication companies.
- Scope: The incentive applies to a wide range of technological nodes (the “size” of the transistors). This includes not just cutting-edge nodes (e.g., 28nm) but also mature nodes (e.g., 45nm, 65nm), which are still vital for the automotive, appliance, and defense industries.
- Status: A major proposal has been approved for a joint venture led by the Tata Group and a Taiwanese partner (PSMC) to establish India’s first major commercial fab.
3. Assembly, Testing, Packaging (ATP) & Compound Semiconductors
- Incentive: Provides a 50% capex incentive (capital investment) for companies to establish ATP facilities.
- Target: To support up to 15 companies in this segment.
- Scope: This scheme also strategically covers Compound Semiconductors (e.g., Gallium Nitride – GaN, Silicon Carbide – SiC). These are special, non-silicon materials used for high-power applications like EV chargers, 5G radios, and advanced LEDs.
- Status: This has been the mission’s most successful component so far, attracting multiple proposals. The most notable is a large-scale ATP facility being built by US chip giant Micron Technologies.
4. Display Technology Scheme
- Note: It’s important to clarify that this scheme is for “display fabs” (manufacturing screens), not semiconductor chips, though it falls under the same high-tech manufacturing umbrella.
- Relevance: Display panels (like LCD and AMOLED) are a massive import component, accounting for 25-50% of a mobile phone’s total cost. This scheme aims to build that capacity domestically.
- Scope & Challenge: The benefits are focused on high-volume screens (LCDs for TVs, AMOLEDs for phones) but do not cover next-generation technologies like QLED or OLED. Furthermore, critics point out that even with a domestic display fab, India would remain 100% dependent on China for the critical raw materials needed to manufacture the screens.
You’ve hit on the most important concept for understanding the modern geopolitics and economics of the chip industry.
The Semiconductor Global Value Chain (GVC) is a system where the different, highly complex stages of making a chip are split among different companies and countries across the globe.
No single country or company can do it all. The industry is a web of deep, unavoidable interdependencies. This GVC exists because of a fundamental conflict:
- Moore’s Law: Demands chips get exponentially better and cheaper.
- Rock’s Law: States the cost of a factory (“fab”) to make those chips doubles every few years, now costing over $20 billion.
This conflict forced companies to become hyper-specialized in just one part of the process to survive.
The Stages and Key Players
Here is a breakdown of the main stages, the key business models, and the “choke points” where a few players have a virtual monopoly.
Business Models to Know
First, you need to know the three types of companies:
- Fabless (e.g., Nvidia, Apple, AMD, Qualcomm): These companies are “architects.” They design the world’s most advanced chips but own no factories (“fabs”). They are superstars at R&D and marketing.
- Foundry (e.g., TSMC, GlobalFoundries): These companies are “master builders.” They manufacture chips for fabless companies. They are “for-hire” factories and don’t design their own-brand chips.
- IDM (Integrated Device Manufacturer) (e.g., Intel, Samsung): These “do-it-all” companies both design and manufacture their own chips in their own fabs.
The Three Main Stages of the GVC
1. Design (The “Blueprint”)
This is the R&D-intensive “fabless” stage where engineers create the chip’s blueprint. It holds most of the chip’s intellectual property and value.
- What it is: Using highly complex software to design the layout of billions of transistors.
- Dominant Players (Companies):
- United States: Unquestioned global leader. Home to Nvidia (for AI chips), Apple (for smartphone chips), AMD (for CPUs), and Qualcomm (for 1G-5G modems).
- United Kingdom: ARM is a critical player. It doesn’t sell chips but licenses its chip architecture (the basic instruction set) used by almost every mobile phone on Earth, including Apple’s.
- Key “Choke Point” (Tools):
- EDA (Electronic Design Automation) Software: This is the special software used to design the chip. This market is a US-based monopoly, dominated by Synopsys and Cadence. You cannot design a modern chip without this software.
2. Manufacturing (The “Factory” or “Fab”)
This is the “foundry” or “IDM” stage. It is the most capital-intensive process on Earth, turning the design blueprint into a physical product on a silicon wafer.
- What it is: Using massive, billion-dollar machines in ultra-clean rooms to etch transistor patterns onto wafers of pure silicon.
- Dominant Players (Companies):
- Taiwan: Absolute dominance. TSMC (Taiwan Semiconductor Manufacturing Company) is the world’s largest and most advanced foundry. It’s the sole manufacturer for companies like Apple and Nvidia. Its technological lead is years ahead of everyone else.
- South Korea: Samsung is the other major advanced player, operating as an IDM (making its own chips) and a foundry (making chips for others).
- United States: Intel is the primary US-based IDM, but it has historically fallen behind TSMC and Samsung in manufacturing technology.
- Key “Choke Point” (Machines):
- EUV Lithography: To print the tiniest, most advanced transistors, you need a machine that uses Extreme Ultraviolet (EUV) light. There is only one company in the world that can make these machines: ASML, based in the Netherlands.
- ASML’s machines are a “monopoly within a monopoly.” They, in turn, rely on a single German company (Zeiss) for their complex lenses.
3. ATP (Assembly, Testing, & Packaging)
This is the final, more labor-intensive stage where the finished wafer is processed into final chips.
- What it is:
- Assembly: The wafer is cut into individual chips (called “dies”).
- Testing: Each chip is tested to see if it works.
- Packaging: The working chips are put into their familiar black plastic casing with metal pins to be soldered onto a circuit board.
- Dominant Players (Countries):
- China, Malaysia, Vietnam, and Taiwan dominate this stage. It is less complex than fabrication but is a critical final step to get a usable product.
Summary: A Global Kitchen Analogy
Think of it as a 5-star meal:
- Design (USA): The world’s greatest chef (Nvidia) writes a revolutionary, complex recipe using a secret, proprietary software (EDA).
- Manufacturing (Taiwan/Netherlands): The chef sends the recipe to the only kitchen in the world (TSMC) that has the one-of-a-kind, magical oven (ASML) required to cook it.
- Packaging (China/Malaysia): The finished food is then sent to a high-volume facility to be perfectly plated, tested for quality, and packaged for delivery.
The Semiconductor GVC is this entire, interconnected global kitchen. A “chip war” is essentially a fight over who controls the recipe software and the magical oven.